Clock rate and power

The ability burning of SRAM varies broadly depending on how frequently it is accessed; it can be as power-hungry as activating RAM, back acclimated at aerial frequencies, and some ICs can absorb abounding watts at abounding bandwidth. On the added hand, changeless RAM acclimated at a somewhat slower pace, such as in applications with moderately clocked microprocessors, draws actual little ability and can accept a about negligible ability burning back sitting abandoned — in the arena of a few micro-watts.

Static RAM exists primarily as:

accepted purpose products

with asynchronous interface, such as the 28 pin 32Kx8 chips (usually called XXC256), and agnate articles up to 16 Mbit per chip

with ancillary interface, usually acclimated for caches and added applications acute access transfers, up to 18 Mbit (256Kx72) per chip

chip on chip

as RAM or accumulation anamnesis in micro-controllers (usually from about 32 bytes up to 128 kilobytes)

as the primary caches in able microprocessors, such as the x86 family, and abounding others (from 8 kB, up to several megabytes)

to abundance the registers and genitalia of the state-machines acclimated in some microprocessors (see annals file)

on appliance specific ICs, or ASICs (usually in the adjustment of kilobytes)